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Si5040
Register 145. TxdLosAssertThresh
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
Type
Reset settings = 0000 0000
TxdLosAssertThresh[7:0]
R/W
Bit
Name
Function
7:0
TxdLosAssertThresh Transmitter Digital Loss of Signal Assert Threshold.
The number of consecutive identical digits before digital LOS is asserted.
Assert threshold in bits = (TxdLosAssertThresh x 5 + 2) x 1024. See Figure 10 on
page 20.
Register 146. TxdLosClearThresh
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
Type
Reset settings = 0110 0000
TxdLosClearThresh[7:0]
R/W
Bit
Name
Function
7:0
84
TxdLosClearThresh[7:0] Transmitter Digital Loss of Signal Clear Threshold.
Clear threshold that releases a digital LOS event.
The number of consecutive 1024 bit fields with at least one transition that are
required to clear dLos is calculated as RxdLos clearthresh x 16 + 1. See
Figure 11 on page 21.
Rev. 1.3
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